ELE2
Further Electronics
Revision Notes
• When the
SET input is briefly taken to logic 0, the
Q output will become logic 1 and the
output will become logic 0.
• When the
RESET input is now briefly taken to logic 0,
Q will become logic 0 and the
output will become logic 1.
T ≈ R × C
- When input of gate X goes low the output of gate X goes high.
- This starts to charge capacitor C through resistor R and so makes the input of gate Y high.
- The output of gate Y goes low, which is fed back to gate X so keeping its output high.
- C charges through R until the input voltage to gate Y is below half of the supply voltage.
- The output of gate Y goes high, making output of gate X low, circuit resets.
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T ≈ 2 × R × C
f = 1 / T
- Control input to first NAND gate goes high.
- Output of first NAND gate goes low, output of astable goes high.
- Capacitor discharges and charges in opposite direction.
- Until voltage at input to first NAND gate <+Vs/2.
- Output of astable switches state.
- Capacitor charges in opposite direction.
- Process repeats as long as control is high.
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- S sets Q to 1
- R resets Q to 0
- Independent of the state of CK.
- On the rising edge of CK, Q is set to the logic state of D.
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- Enables data to be outputted from data bus.
- Processor sets valid data onto data bus and then pulses CK high.
- Data captured and stored in latches.
- One flip-flop needed per bit.
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• On the rising edge of each clock pulse, the data from a D-type flip-flop is stored in the next D-type flip-flop.
• This data transfer occurs all of the way along the shift register.
• Data from the output of the last flip-flop is lost.
• New data applied to the input of the first flip-flop is taken into the shift register.
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To make a flip-flop toggle:-
-
S and
R are connected to 0
-
D is connected to
- The
D input is then always opposite to
Q- So toggling occurs on each successive clock pulse.
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- D to
- All Resets joined together
- CK to previous Q for down counter and
for an up counter
- All resets joined together and connected to 0
- Only up-counters.
- AND gate output connected to reset.
- AND gate inputs connected to appropriate Q outputs.
- 5, Q0 & Q2
- 6, Q1 & Q2
- 10, Q1 & Q3
- 12, Q2 & Q3
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Commutative Laws:
A + B = B + A
A · B = B · A
Associative Laws:
A + (B + C) = (A + B) + C
A ·(B · C) = (A · B) · C
Distributive Law:
A · (B + C) = A · B + A · C
De Morgan's theorem:
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Vout = A ×(V+ − V−)
Properties
• Differential amplifier
• Large input resistance ≈109Ω
• Large open-loop voltage gain, A, ≈106
• Low output resistance ≈100Ω
• Frequency compensated
• Gain-bandwidth product
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• Input resistance = R1
• Output inverted
• Virtual earth point
• Saturation/clipping
• Bandwidth/voltage gain
• Minimum resistance 1kΩ
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• Recognise by multiple inputs
• Input resistance of each input = R
• Behaves the same as the inverting amplifier
• Used in DAC & Mixer
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• Very large input resistance ≈ 10
9Ω
• Beware input resistor to 0V
• Output in phase with input
• Voltage gain/bandwidth
• Minimum voltage gain = 1
• Voltage follower when R
f = 0 or R
1 = ∞
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• Voltage gain ≈ 0.7 – 1
• Current gain ≈ 109
• Output voltage in phase with input
• Very large input resistance ≈ 109Ω
• Remember to subtract Vgs from Vin to obtain Vout
• N-channel and p-channel
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• Provides power gain
• Needs op-amp to provide voltage gain
• Cross-over distortion at low volume
- Bias MOSFETs into conduction
• Saturation/clipping at high volume
- Increase supply voltage or reduce input voltage
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• Negative feedback
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• Heat sinks
- Metal
conduction
- Black
Radiation
- Large surface area
Convection
Radiation
- Fan
Convection
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• Reactance
– the opposition to the flow of alternating current
• Measured in ohms
• Capacitor reactance decreases with frequency
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• Allows low frequency signals to pass, attenuates high frequency signals
• Break point Xc = R
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• Allows high frequency signals to pass, attenuates low frequency signals
• Break point Xc = R
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• Set in context
– read the context
– underline relevant details
• Look carefully at circuit diagrams
– circle and name sub-systems
• Focus on relevant bookwork descriptions and calculations
– answer these
• Attempt all sections
– no credit can be given if there is no attempt at an answer
• Estimate, Calculate
– show your working
• State and explain
– do both!
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